sâmbătă, 1 decembrie 2012

Altera demonstrate the first paragraph of the industry based on model FPGA floating-point DSP tools - Business

Altera company has demos FPGA floating-point DSP design process, this is new in the first paragraph of the industry based on model of floating design tools, support the FPGA realized in the plural floating-point DSP algorithm. Berkeley design technology company (BerkeleyDesignTechnology, Inc, BDTI) of the independent analysis verified in the Stratix ?? can Altera and ArriaFPGA series simple to realize high performance DSP efficient floating-point design.

Altera floating-point DSP design process including integration in DSPBuilder senior module base of Altera floating-point DSP compilers, QuartusIIRTL tools chain, ModelSim simulator, and MathWorksMATLAB and Simulink tool, simplified the FPGA DSP algorithm process. design flow and integrated with the algorithm model and simulation, RTL produced, comprehensive, layout and wiring design verification level, etc. Through the functional integration, in the algorithm level and FPGA level realized the fast development and design, and eventually reduce the space management in the design of the input.

Altera product and the enterprise market vice President VinceHu comment on to say: "the use of the model based on DSP Altera advanced process, and based on the traditional design of HDL, compared to more efficient design personnel and verify the realization of plural quickly arithmetic. The top in the algorithm modeling and after testing, it is easy to AlteraFPGA facing all of comprehensive design."

Altera new design process is applicable to solve linear algebra problem of the demand is higher, the class of problems generally need to provide the dynamic range of . The BDTI test and the parameter of floating matrix inverse design. Inverse matrix is a radar system, wireless system and medical imaging multiple-input multiple-output (MIMO) and many other DSP applications use of representative processing functions.

In the assessment of Altera floating-point design process, the independent technical analysis company BDTI think: " the compiler and not from the basic construction of floating-point operators path of data fusion, but produce data paths, in a function or data access the basic operator in combination. So, avoid the traditional the FPGA design of repeat said." BDTI conclusion: "the data access method, fusion than ever before, realize the plural of data access better performance and more efficient."

Altera company has demos FPGA floating-point DSP design process, this is new in the first paragraph of the industry based on model of floating design tools, support the FPGA realized in the plural floating-point DSP algorithm. Berkeley design technology company (BerkeleyDesignTechnology, Inc, BDTI) of the independent analysis verified in the Stratix ?? can Altera and ArriaFPGA series simple to realize high performance DSP efficient floating-point design.

Altera floating-point DSP design process including integration in DSPBuilder senior module base of Altera floating-point DSP compilers, QuartusIIRTL tools chain, ModelSim simulator, and MathWorksMATLAB and Simulink tool, simplified the FPGA DSP algorithm process. design flow and integrated with the algorithm model and simulation, RTL produced, comprehensive, layout and wiring design verification level, etc. Through the functional integration, in the algorithm level and FPGA level realized the fast development and design, and eventually reduce the space management in the design of the input.

Altera product and the enterprise market vice President VinceHu comment on to say: "the use of the model based on DSP Altera advanced process, and based on the traditional design of HDL, compared to more efficient design personnel and verify the realization of plural quickly arithmetic. The top in the algorithm modeling and after testing, it is easy to AlteraFPGA facing all of comprehensive design."

Altera new design process is applicable to solve linear algebra problem of the demand is higher, the class of problems generally need to provide the dynamic range of . The BDTI test and the parameter of floating matrix inverse design. Inverse matrix is a radar system, wireless system and medical imaging multiple-input multiple-output (MIMO) and many other DSP applications use of representative processing functions.

In the assessment of Altera floating-point design process, the independent technical analysis company BDTI think: " the compiler and not from the basic construction of floating-point operators path of data fusion, but produce data paths, in a function or data access the basic operator in combination. So, avoid the traditional the FPGA design of repeat said." BDTI conclusion: "the data access method, fusion than ever before, realize the plural of data access better performance and more efficient."



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